As a key member of DDC’s ASIC design team the Digital Design Engineer serves as an ASIC/SoC/FPGA lead architect for DDC’s next-generation of data bus networking products. This position plays a principal role in developing chip/board architecture, performing IP development/integration, and chip level RTL design & verification. This role is expected to hold responsibility for, and contribute positively to, all phases of ASIC/SoC/FPGA development, starting from creation of an architectural specification through ASIC/SoC/FPGA sign-off.
· Ensure implementation of Company safety, health and environmental programs for employees whose work is directed. Ensure that safe work practices are followed and the environment is fully protected in accordance with Company policy and governmental regulations.
· Commitment to the Company’s policies, principles, and procedures and adheres the Company’s procedures including Environmental, Health and Safety (EH&S), Equal Employment Opportunity (“EEO”), discipline/corrective action, and security.
· Provide technical leadership role within the Engineering department to solve difficult technical challenges or problems and bring new technical capability to DDC’s Engineering department.
· Perform original and innovative circuit design and distill large scale designs into architectural elements that facilitate the division of design work amongst teams of two or more engineers.
· Implement inventive approaches and develop clearly written design specifications that ensure DDC’s products are design to succeed in the market relative to their technical performance, feature set, cost, and time to market requirements.
· Conceive methods for achieving product requirements and specifications using appropriate circuit design, process, manufacturing, and mechanical techniques.
· Mentor, coach, and train Jr. Engineers to facilitate their career development technically and professionally.
· Take the initiative to research, develop, propose, evaluate and/or implement new methods, processes, techniques, tools, components, or technology that improve quality, timeliness, and/or performance of DDC’s products or engineering work.
Required Knowledge, Skills and Abilities:
· Effective oral and written communication skills.
· Relevant field knowledge
· Strong RTL coding/simulation/debug capabilities using VHDL and/or Verilog (VHDL preferred)
· Experience with RTL simulation, Synthesis, and Static Timing Analysis in multiple vendor’s toolsets
· Familiarity with multiple high-speed IP protocols including PCIe, USB, DDR, SATA, GbE
· Knowledge of ARM-based SoC processor designs
· System Verilog and assertion based verification experience a plus
· DO-254 design environment experience a plus
Educational / Experience Qualifications:
· Bachelor's Degree Required.
· Master's Degree Preferred .
· 15 + years relevant work experience required.
· Any combination of education, training and experience listed above that demonstrates the ability to perform the duties of the position.